標題: CS4344、MS4344的完全兼容替代CL1009，24位超低功率立體聲移動(dòng)編解碼D類(lèi)放大器 [打印本頁(yè)] 作者: 趙妍和 時(shí)間: 2021-6-9 14:49 標題: CS4344、MS4344的完全兼容替代CL1009，24位超低功率立體聲移動(dòng)編解碼D類(lèi)放大器 The CL1009 features a flexible clocking architecture, allowing the device to use reference clock frequencies of
5.6448 or 6.144 MHz, or any standard audio master clock. A stereo mic input is routed to a PGA then to a stereo
ADC. The mic inputs has +12 or +18 dB gain. Low-noise mic bias voltage supplies are also provided. The stereo ADC
output is decimated, selectively DC highpass filtered, selectively 5 Band BiQuad Equalized, channel-swapped or
mono-to-stereo routed, wind noise filtered and volume adjusted or muted. The volume levels can be automatically
adjusted via a programmable ALC and soft noise gate. A digital mixer is used to mix and route the CL1009’s inputs
(analog inputs to ADC or serial ports) to outputs (Class D amplifiers or serial ports). Each mixer input has
independent attenuation. Volume adjustment and mute control is applied to the output paths from the digital mixer to
the Pulse Width Modulator(PWM). The PWM feeds the CLASS D Amps. 5 band BiQuad Equalizer supply different
sound colors. A high-speed I2C control port interface capable of up to 400 kHz operation facilitates register
programming.The CL1009 is available in 32L QFN4x4 packages for the commercial (-30° to +85° C) grade
2. Applications
◆ Drone
◆ Wireless IP camera
◆ Mobile Internet Devices
◆ Car Driving Camera
3. Features
◆ Native support for 5.6448/6.144/11.2896/12.288 MHz master clock rates
◆ Individual power-down controls for ADCs, micbias generators, serial ports, PWM, and
CLASS D output amplifiers
◆ PGA In and ADC 98db SNR (A-weighted) with 1.1 Vrms Input, 97db Dynamic Range (A-weighted)
◆ PGA In and ADC -96 dB THD+N