I2C總線(xiàn)規范V2.1

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This version of the 1992 I2C-bus specification includes the
following modifications:
· Programming of a slave address by software has been
omitted. The realization of this feature is rather
complicated and has not been used.
· The “l(fā)ow-speed mode” has been omitted. This mode is,
in fact, a subset of the total I2C-bus specification and
need not be specified explicitly.
· The Fast-mode is added. This allows a fourfold increase
of the bit rate up to 400 kbit/s. Fast-mode devices are
downwards compatible i.e. they can be used in a 0 to
100 kbit/s I2C-bus system.
· 10-bit addressing is added. This allows 1024 additional
slave addresses.
· Slope control and input filtering for Fast-mode devices is
specified to improve the EMC behaviour.
NOTE: Neither the 100 kbit/s I2C-bus system nor the
100 kbit/s devices have been changed.