數字設計工程師

發(fā)布時(shí)間:2019-5-17 13:30    發(fā)布者:KT咨詢(xún)
關(guān)鍵詞: 數字電路設計 , 數;旌 , 通信
NO.499-【獵頭職位:上海需要一位   數字設計工程師】聯(lián)系人:Raymond-Chen,郵箱:hr@kthr.com,微信也可查詢(xún)職位了!打開(kāi)手機微信,搜號碼“KTHR_COM”或查找微信公眾帳號“KT人才”或掃描以上二維碼即可添加,歡迎大家關(guān)注!
Job Description:
1.     Thisposition is for a digital/ASIC design engineer to build next-generationanalog/digital mixed SoC chips.
2.     Handlingevery aspect in ASIC design flow including architecture, RTL coding,Verification, Synthesis, DFT, STA and P&R.
3.        Participateinto the chip debug and validation.
Job Requirement:
1.     BSEEwith minimum 3-year of working experience or MSEE with minimum 1-year ofworking experience for starting position
2.     MSEEwith minimum 3-year of working experience for senior position.
3.     Excellentknowledge for ASIC design, such as MOS transistor, arithmetic structure(addition, multiplication), timing analysis, design for test, meta-stabilityand etc.
4.     Needfundamental understanding for digital signal processing, such as FIR/IIR filterstructure, digital error correction, decimation/interpolation and etc.
5.     Usageexperience (not all of them required) of industry-standard EDA tools, such asVCS/NC, Design Compiler, Primetime, Formality/Conformal and Tetramer/DFTcompiler.
6.     Experiencein bus design (SPI, I2C, AHB or AIX), data path design (Filter, correlation orCodec), SerDescontroller (PCS and MAC) and PHY (channel encoder/decoder) willbe a plus.
7.     Experiencein metrics driven verification methodology (system Verilog/UVM based) will be aplus.
8.        Experiencein every aspect of ASIC design will be a great plus.
福利:五險一金  年終獎金

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